Memory state flow analysis and its application
| Author(s) | An, Xiaomi | |
| Date Accessioned | 2011-07-11T12:38:24Z | |
| Date Available | 2011-07-11T12:38:24Z | |
| Publication Date | 2011 | |
| Abstract | The Cray XMT supercomputer system is the third generation of the Cray MTA supercomputer architecture. It is a scalable massively multithreaded platform which is based on the Cray XT infrastructure and uses the Cray massively parallel processing (MPP) system design. The XMT system uses Threadstorm processors which have a global shared memory. A very interesting feature of XMT is that it provides a fine-grain data-centric synchronization for managing concurrency by extending each memory word with tag bits. A tag bit can be in one of two states: full or empty. Cray XMT supports a number of synchronized memory operations to read from and write to tagged memory. A synchronized read/write operation can be suspended if a corresponding memory cell is not in an expected state. For example, a synchronized memory operation can be suspended if it reads from an empty memory address or writes to a full memory address. If in a parallel program a suspended operation can never get to an expected memory state, the operation will be suspended forever. We say that the program/operation is "deadlocked". Although the synchronized operations provide extreme exibility to implement fine-grain parallelization of both regular and irregular applications, it is very easy to get programs into deadlock. And due to the lack of parallel program debugging tools and runtime support to detect such program deadlocks, it is hard to locate this kind of synchronization errors. So it is important to develop an effective static analysis algorithm which can detect them as early as possible. The typestate analysis is a static program verification technique which can identify illegal operations performed on some objects due to the wrong object state. However, almost all the previous works on typestate analysis only deal with sequential programs and cannot work for concurrent programs. In this thesis we present a new analysis technique, called memory state flow analysis to determine whether a given parallel program with synchronized read/write operations will deadlock. We extend the classical static single assignment (SSA) form with memory state information (called MSSA form) and use that to compute the memory state of each program variable at certain program points. Based on the MSSA form, we perform memory state verification to determine whether a synchronized read or write operation will ever be deadlocked. Our approach can also handle pointer variables and array sections. The main contributions of our work are: (1) a framework to do memory state analysis is built, which catches the main features related to the memory state of parallel programs. (2) a memory state veri cation method to detect a potential program deadlock is developed. Thus, the essentially exponential-complex problem is decoupled and solved using dataflow analysis with simple heuristics, and most program deadlocks problems can be caught by careful heuristics design. We have implemented our analysis using the Open64 compiler, and we present some preliminary results. The preliminary results show that our memory state flow analysis can detect most of the program deadlock problems. For example we can detect program deadlocks due to unbalanced synchronized operation types, defective operation order, etc. We also include a survey of related work, such as static program veri cation for concurrent systems, program representation and dataflow analysis for parallel programs, typestate analysis, etc. A conclusion and a survey of future work are also presented. | en_US |
| Advisor | Gao, Guang R. | |
| Degree | M.S. | |
| Department | University of Delaware, Department of Electrical and Computer Engineering | |
| URL | http://udspace.udel.edu/handle/19716/9804 | |
| Publisher | University of Delaware | en_US |
| dc.subject.lcsh | Cray computers | |
| dc.subject.lcsh | Parallel processing (Electronic computers) | |
| dc.subject.lcsh | Debugging in computer science | |
| Title | Memory state flow analysis and its application | en_US |
| Type | Thesis | en_US |